As semiconductor process geometries become smaller and electronic device supply voltages become lower, the operating power supply currents of electronic devices such as the application specific integrated circuit (ASIC), field programmable gate array (FPGA), application specific standard product (ASSP), etc. are ever increasing. For example, an electronic device with 70 W power dissipation and fabricated using 28 nm (nano-meter) semiconductor process geometry may receive 70 A operating current from an operating power supply voltage of approximately 1 V. In another example, an electronic device fabricated using 7 nm semiconductor process geometry may receive over 200 A operating current from an operating power supply voltage that is less than 1 V resulting in 100 W-150 W power dissipation. As a result, the area occupied by power circuits on a printed circuit board (PCB) is becoming larger. For example, the PCB area dedicated to the associated power circuit around the electronic device may be similar or even exceed the area of the electronic device. In addition, a larger number of connection pins/balls on the electronic device package are dedicated to the power circuit.